Design Verification Engineer at CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
H-1B Salary Data · 8 certified filings
Section 1
How much does CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. pay Design Verification Engineer?
CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. pays Design Verification Engineer an average of $162,734 based on 8 certified H-1B filings. Salaries range from $129,168 to $206,000.
$162,734
Average
$176,800
Median
$129,168
Minimum
$206,000
Maximum
CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. pays 0.3% below the industry average of $163,199 for this role.
Design Verification Engineer at CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. by Location
| Location | Avg. Salary | Filings |
|---|---|---|
| Austin, TX | $162,734 | 8 |
Section 2
Design Verification Engineer at Other Companies
Other Roles at CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
Section 3
Source: US Department of Labor LCA Disclosure Data. Updated: Q1 FY2025.