What is the FPGA Silicon Design Verification Engineer salary range at Altera Corporation?

H-1B salaries for FPGA Silicon Design Verification Engineer at Altera Corporation range from $94,414 to $161,179, with an average of $135,900.

FPGA Silicon Design Verification Engineer at Altera Corporation

H-1B Salary Data · 6 certified filings

Section 1

How much does Altera Corporation pay FPGA Silicon Design Verification Engineer?

Altera Corporation pays FPGA Silicon Design Verification Engineer an average of $135,900 based on 6 certified H-1B filings. Salaries range from $94,414 to $161,179.

$135,900

Average

$151,895

Median

$94,414

Minimum

$161,179

Maximum

FPGA Silicon Design Verification Engineer at Altera Corporation by Location

Location	Avg. Salary	Filings
Austin, TX	$148,543	2
San Jose, CA	$141,299	3
Hillsboro, OR	$94,414	1

Section 2

Other Roles at Altera Corporation

Product Development Engineer ($132,742) SoC Design Verification Engineer ($112,981) SoC Logic Design Engineer ($158,155) FPGA Silicon Design Engineer ($158,078) Software Enabling and Optimization Engineer ($160,597)

Section 3

Source: US Department of Labor LCA Disclosure Data. Updated: Q1 FY2025.